Usami Kimiyoshi | Department Of Information Science And Engineering Shibaura Institute Of Technology

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• 同名の論文著者
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関連著者

• Usami Kimiyoshi

  Department Of Information Science And Engineering Shibaura Institute Of Technology

• USAMI Kimiyoshi

  Department of Computer Science and Engineering, Waseda University

• Nakamura Hiroshi

  Graduate School Of Information Science And Technology The University Of Tokyo

• YOSHIOKA Hiroshi

  Department of Radiology, Institute of Clinical Medicine, University of Tsukuba

• Amano Hideharu

  Faculty Of Science And Technology Keio University

• NAKAMURA HIROSHI

  Graduate School of Life and Environmental Sciences, University of Tsukuba

• Namiki Mitaro

  Department Of Computer And Information Sciences Tokyo University Of Agriculture And Technology

• Togawa Nozomu

  Department Of Computer Science And Engineering Waseda University

• Yanagisawa Masao

  Department Of Cardiology Nippon Medical School

• Yoshioka Hiroshi

  Department Of Clinical Pharmacology The University Of Tokushima Faculty Of Pharmaceutical Sciences

• Yoshioka Hiroshi

  Department Of Information Science And Engineering Shibaura Institute Of Technology

• TAKEDA Seidai

  Graduate School of Engineering, The University of Tokyo

• KIM Kyundong

  Graduate School of Engineering, The University of Tokyo

• Kim Kyundong

  Graduate School Of Engineering The University Of Tokyo

• Takeda Seidai

  Graduate School Of Engineering The University Of Tokyo

• Abe Shin-ya

  Department of Computer Science and Engineering, Waseda University

• KONDO Masaaki

  Graduate School of Information Systems, The University of Electro-Communications

• WANG Weihan

  Faculty of Science and Technology, Keio University

• OHTA Yuya

  Department of Information Science and Engineering, Shibaura Institute of Technology

• SHI Youhua

  Waseda Institute for Advanced Study, Waseda University

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著作論文

• Dynamic Sleep Control for Finite-State-Machines to Reduce Active Leakage Power(Logic Synthesis)(VLSI Design and CAD Algorithms)
• Sleep Transistor Sizing Method Using Accurate Delay Estimation Considering Input Vector Pattern and Non-linear Current Model
• Fine-Grained Run-Tume Power Gating through Co-optimization of Circuit, Architecture, and System Software Design
• Floorplan Driven Architecture and High-Level Synthesis Algorithm for Dynamic Multiple Supply Voltages

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