Wei Shugang | Department Of Computer Science Gunma University

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著作論文

FPGA implementation of gain calculation using a polynomial expression for audio signal level dynamic compression
A VLSI implementation method of a compressor for audio systems
Performance Evaluation of Signed-Digit Architecture for Weighted-to-Residue and Residue-to-Weighted Number Converters with Moduli Set (2^n-1,2^n,2^n+1)(Computer Architecture)
New Booth Modulo m Multipliers with Signed-Digit Number Arithmetic(Computer Architecture)
New Booth Modulo m Multipliers with Signed-Digit Number Arithmetic
Performance Evaluation of Signed-Digit Architecture for Weighted-to-Residue and Residue-to-Weighted Number Converters with Moduli Set (2n-1, 2n, 2n+1)
Performance Evaluation of Signed-Digit Architecture for Weighted-to-Residue and Residue-to-Weighted Number Converters with Moduli Set (2n-1, 2n, 2n+1)
New Booth Modulo m Multipliers with Signed-Digit Number Arithmetic

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