YOSHIZAWA Shingo | Graduate School of Information Science and Technology, Hokkaido University

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概要

• 同名の論文著者
• Graduate School of Information Science and Technology, Hokkaido Universityの論文著者

関連著者

• YOSHIZAWA Shingo

  Graduate School of Information Science and Technology, Hokkaido University

• MIYANAGA Yoshikazu

  Graduate School of Information Science and Technology, Hokkaido University

• Yoshizawa Shingo

  Graduate School Of Engineering Hokkaido University

• Miyanaga Yoshikazu

  Graduate School Of Engineering Hokkaido University

• Miyanaga Yoshikazu

  Graduate School Of Information Science And Technology Hokkaido University

• MIYANAGA Yoshikazu

  Hokkaido University

• IKEUCHI Hirokazu

  Graduate School of Information Science and Technology, Hokkaido University

• Miyanaga Yoshikazu

  北大

• YOSHIZAWA Shingo

  Hokkaido University

• Yoshizawa Shingo

  北大

• Yoshizawa Shingo

  Graduate School Of Information Science And Technology Hokkaido University

• Miyanaga Yoshikazu

  Graduate School Of Information Science Technology Hokkaido University

• Shi Xiaonan

  北大

• LAKANCHANH Donekeo

  Faculty of Engineering, King Mongkut's Institute of Technology Ladkrabang

• NOPPANAKEEPONG Suthichai

  Faculty of Engineering, King Mongkut's Institute of Technology Ladkrabang

• Shi Xiaonan

  Graduate School of Information Science and Technology, Hokkaido University

• YAMAUCHI Yasushi

  Graduate School of Information Science and Technology, Hokkaido University

• Yamauchi Yasushi

  Graduate School Of Information Science And Technology Hokkaido University

• Ikeuchi Hirokazu

  Graduate School Of Information Science And Technology Hokkaido University

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著作論文

• VLSI Implementation of a Scalable Pipeline MMSE MIMO Detector for a 4×4 MIMO-OFDM Receiver
• A-20-9 A Study of Phase and Distance Histogram Compensation for OFDM Blind Modulation Detection in Adaptive OFDM Communication
• Performance evaluation of quasi-cyclic LDPC codes for IEEE802.11n based MIMO-OFDM systems (スマートインフォメディアシステム)
• Tunable Wordlength Architecture for a Low Power Wireless OFDM Demodulator(VLSI Design Technology and CAD)
• VLSI Implementation of a Complete Pipeline MMSE Detector for a 4 × 4 MIMO-OFDM Receiver
• VLSI Implementation of a Scalable Pipeline MMSE MIMO Detector for a 4 x 4 MIMO-OFDM Receiver

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