Mathematical Foundation on Static Hazards in Multiple-Valued Logic Circuits

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概要

• 論文の詳細を見る
• 2003-06-01

著者

• TAKAGI Noboru

  Department of Management and Information Science, Nagasaki Insutitute of Applied Science

• NAKASHIMA Kyoichi

  Department of Electronics and Informatics, Faculty of Engineering, Toyama Prefectural University

関連論文

• Decomposition of Surface Data into Fractal Signals Based on Mean Likelihood and Importance Sampling and Its Applications to Feature Extraction(Digital Signal Processing)
• A Fail-Safe Condition for Multiple-Valued Logic Circuits Consisting of AND, OR and NOT Gates
• A Necessary and Sufficient Condition for Kleenean Functions
• Mathematical Foundation on Static Hazards in Multiple-Valued Logic Circuits(Special Section on Papers Selected from ITC-CSCC 2002)
• Mathematical Foundation on Static Hazards in Multiple-Valued Logic Circuits

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