Thermal and plasma treatments for improved (sub-)1 nm equivalent oxide thickness planar and FinFET-based replacement metal gate high-k last devices and enabling a simplified scalable CMOS integration scheme
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概要
- 論文の詳細を見る
- Institute of Physicsの論文
- 2014-03-18
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関連論文
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- Two- and Three-Dimensional Fully-Depleted Extension-Less Devices for Advanced Logic and Memory Applications
- Thermal and plasma treatments for improved (sub-)1 nm equivalent oxide thickness planar and FinFET-based replacement metal gate high-k last devices and enabling a simplified scalable CMOS integration scheme