Avalanche Breakdown Design Parameters in GaN
スポンサーリンク
概要
- 論文の詳細を見る
We have studied the avalanche breakdown design parameters of GaN n+/p and p+/n junctions in the voltage range of 1.2 to 12 kV using numerical simulations and analytical calculations. Important analytical models regarding the relationships between breakdown voltages, depletion width, maximum junction electric field and doping concentrations have been extracted which shows very high consistency with the results from numerical simulations. These analytical models can be used as guidelines in the designing of GaN high voltage power devices. The multiplication factors M_{\text{n}} and M_{\text{p}} have also been obtained and the analytical models have been extracted. The results showed that in GaN, n+/p junction is better than p+/n for the main voltage blocking junction due to a sharper avalanche current increase.
- 2013-08-25
著者
-
Chow T.
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY 12180, U.S.A.
-
Li Zhongda
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY 12180, U.S.A.
-
Pala Vipindas
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY 12180, U.S.A.
関連論文
- Metal--Oxide--Semiconductor Interface and Dielectric Properties of Atomic Layer Deposited SiO
- Avalanche Breakdown Design Parameters in GaN
- Design and Simulation of Novel Enhancement Mode 5-20 kV GaN Vertical Superjunction High Electron Mobility Transistors for Smart Grid Applications (Special Issue : Recent Advances in Nitride Semiconductors)
- Metal-Oxide-Semiconductor Interface and Dielectric Properties of Atomic Layer Deposited SiO₂ on GaN (Special Issue : Recent Advances in Nitride Semiconductors)