Metal--Oxide--Semiconductor Interface and Dielectric Properties of Atomic Layer Deposited SiO
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概要
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The dielectric and MOS interface properties of SiO<inf>2</inf>deposited with atomic layer deposition (ALD) on GaN with different surface treatments have been investigated with DC current--voltage (I--V) measurements and UV-assisted capacitance--voltage (C--V) measurements. Dielectric breakdown characteristics and leakage conduction mechanism for ALD SiO<inf>2</inf>depend on surface conditions. Dry etch with NaOH post-etch GaN surface exhibited high oxide breakdown voltage with small distribution, larger barrier height characteristics, and higher charge to breakdown characteristics when compared with un-etched surface condition and dry etch with tetramethylammonium hydroxide (TMAH) post-etch surface condition. Moreover, fixed charge density and interface trap density at MOS interface extracted by UV-assisted C--V were comparable between un-etched surface sample and dry etch with NaOH post-etch surface sample, indicating dry etching damage recovery and demonstrating the usability of NaOH post-etching treatment. Comparison has also been made to a composite oxide of SiO<inf>2</inf>/Al<inf>2</inf>O<inf>3</inf>/SiO<inf>2</inf>, showing possibility of oxide charge engineering toward positive threshold voltage but carrier trapping by insertion of Al<inf>2</inf>O<inf>3</inf>.
- 2013-08-25
著者
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Chow T.
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY 12180, U.S.A.
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Takashima Shinya
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY 12180, U.S.A.
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Li Zhongda
Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, NY 12180, U.S.A.
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