An Analytical Model of Surface Electric Field Distributions in Ultrahigh-Voltage Buried P-Top Lateral Diffused Metal–Oxide–Semiconductor Devices
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概要
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In this paper, we present an analytical model for determining surface electric field distributions in buried P-top lateral-diffused metal–oxide–semiconductor (LDMOS) devices with dual conduction and an enhanced dual conduction layer. The model is based on Poisson's two-dimensional solution and gives closed-form solutions for the surface potential and electric field distributions as functions of structural parameters and drain bias. All analytical results are verified by simulation results obtained from MEDICI and previous experimental data, confirming the validity of the model. In addition, a novel 800 V diffused metal–oxide–semiconductor (DMOS) with enhanced dual conduction paths above a buried P-top device is also presented. The enhanced dual conduction paths reduce on-state resistance by 22% as compared with state-of-the-art dual conduction paths and thin silicon-on-insulator (SOI) technologies. An $R_{\text{on}}$ of less than 125 m$\Omega$ cm2 is achieved with 809 and 782 V off- and on-states breakdown voltages, respectively, at $V_{\text{g}} = 5$ V.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2010-07-25
著者
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Yang Shao-Ming
Department of Computer Science and Information Engineering, Asia University, Taichung 41354, Taiwan
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Sheu Gene
Department of Computer Science and Information Engineering, Asia University, Taichung 41354, Taiwan
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Chang Yi-Fong
Department of Computer Science and Information Engineering, Asia University, Taichung 41354, Taiwan
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Tsaur Shyh
Department of Computer Science and Information Engineering, Asia University, Taichung 41354, Taiwan
関連論文
- Novel Silicon-on-Insulator Lateral Power Device with Partial Oxide Pillars in the Drift Region
- An Analytical Model of Surface Electric Field Distributions in Ultrahigh-Voltage Buried P-Top Lateral Diffused Metal–Oxide–Semiconductor Devices