Novel Silicon-on-Insulator Lateral Power Device with Partial Oxide Pillars in the Drift Region
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概要
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In this paper, a novel silicon-on-insulator (SOI) lateral power device with partial oxide pillars in the drift region is proposed and investigated using a three dimensional device simulator. The structure is characterized by the alternate doped silicon pillars and oxide pillars in the drift region, which can be fabricated by the dielectric isolation process without any additional mask. Owing to the modulation of the oxide pillars, a new additional electric field peak is introduced in the middle of the drift region, thus reducing the surface electric field peaks and transferring the breakdown location. Compared with the conventional reduced surface field (RESURF) device, a 21.5% increase in the breakdown voltage and a 50% increase in the figure of merit (FOM) are obtained in the novel device.
- 2013-01-25
著者
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Sheu Gene
Department of Computer Science and Information Engineering, Asia University, Taichung 41354, Taiwan
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Huang Shi
Nanjing University of Posts and Telecommunications, Nanjing, Jiangsu 210003, China
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Guo Yufeng
Nanjing University of Posts and Telecommunications, Nanjing, Jangsu 210003, China
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Yao Jiafei
Nanjing University of Posts and Telecommunications, Nanjing, Jangsu 210003, China
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Hua Tingting
Nanjing University of Posts and Telecommunications, Nanjing, Jangsu 210003, China
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Zhang Changchun
Nanjing University of Posts and Telecommunications, Nanjing, Jangsu 210003, China
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Yao JiaFei
Nanjing University of Posts and Telecommunications, Nanjing, Jiangsu 210003, China
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Guo Yufeng
Nanjing University of Posts and Telecommunications, Nanjing, Jiangsu 210003, China
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Xia Xiaojuan
Nanjing University of Posts and Telecommunications, Nanjing, Jiangsu 210003, China
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Huang Shi
Nanjing University of Posts and Telecommunications, Nanjing, Jangsu 210003, China
関連論文
- Novel Silicon-on-Insulator Lateral Power Device with Partial Oxide Pillars in the Drift Region
- An Analytical Model of Surface Electric Field Distributions in Ultrahigh-Voltage Buried P-Top Lateral Diffused Metal–Oxide–Semiconductor Devices
- Novel Bulk Silicon Lateral Double-Diffused Metal--Oxide--Semiconductor Field-Effect Transistors Using Step Thickness Technology in Drift Region