Novel Design of Vertical Double-Diffused Metal–Oxide–Semiconductor Transistor for High Electrostatic Discharge Robustness

スポンサーリンク

概要

• 論文の詳細を見る

• [Bipolar]-[complementary metal–oxide–semiconductor transistor (CMOS)]–[double-diffused metal–oxide–semiconductor transistor (DMOS)] [BiC–DMOS] devices are widely used in high-voltage applications. As some applications require high electrostatic discharge (ESD) robustness, we studied the vertical DMOS (VDMOS) transistor to improve ESD robustness. In this paper, we propose a balanced VDMOS (B-VDMOS) transistor. A B-VDMOS transistor is optimized for a cell layout to improve current uniformity after avalanche breakdown by arranging a number of sources. As the B-VDMOS transistor can prevent current concentration, it is not destroyed after avalanche breakdown and acquires a high second breakdown current. Owing to the high second breakdown current, the B-VDMOS transistor can improve ESD robustness by 50% according to the human body model (HBM) test compared with a conventional VDMOS (C-VDMOS) transistor. As the B-VDMOS transistor has high ESD robustness, it can be used in harsh applications and systems.

• 2009-04-25

著者

• Maegawa Shigeto

  Mixed Signal Device Technology Department Devices & Analysis Technology Division Renesas Electro

• Hatasako Kenichi

  Mixed Signal Device Technology Department Devices & Analysis Technology Division Renesas Electro

• Yamamoto Fumitoshi

  Mixed Signal Device Technology Department Devices & Analysis Technology Division Renesas Electro

• Kuroi Takashi

  Mixed Signal Device Technology Department Devices & Analysis Technology Division Renesas Electro

• Uenishi Akio

  Mixed Signal Device Technology Department Devices & Analysis Technology Division Renesas Electro

• Maegawa Shigeto

  Mixed Signal Device Technology Department, Production and Technology Unit, Renesas Technology Corporation, 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Kuroi Takashi

  Mixed Signal Device Technology Department, Production and Technology Unit, Renesas Technology Corporation, 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Hatasako Kenichi

  Mixed Signal Device Technology Department, Production and Technology Unit, Renesas Technology Corporation, 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

• Yamamoto Fumitoshi

  Mixed Signal Device Technology Department, Production and Technology Unit, Renesas Technology Corporation, 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

関連論文

• Analysis of Snapback Phenomena in VDMOS Transistor having the High Second Breakdown Current : A High ESD Mechanism Analysis
• ESD Robustness Improvement for Integrated DMOS Transistors-The Different Gate-Voltage Dependence of I_ Between VDMOS and LDMOS Transistors
• Novel Design of Vertical Double-Diffused Metal–Oxide–Semiconductor Transistor for High Electrostatic Discharge Robustness

スポンサーリンク