Turn-Around of Threshold Voltage in Gate Bias Stressed p-Channel Power Vertical Double-Diffused Metal–Oxide–Semiconductor Transistors
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概要
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The “turn-around” of threshold voltage in high gate electric field stressed p-channel power vertical double-diffused metal–oxide–semiconductor (VDMOS) transistors was observed and analyzed in details. This unexpected effect was observed only in devices stressed by enough high positive gate voltages, leading to the gate electric fields above 6.3 MV/cm, and it was more pronounced in those stressed by higher voltages, when threshold voltage shift exhibited very strong dependence on stressing time. The quantitative analysis of the results obtained revealed that stress-induced instabilities of the gate oxide charge and interface traps, due to a complex electrochemical processes occurring in the gate oxide and at silicon–oxide interface during the stressing, were responsible for the observed “turn-around” effect.
- 2008-08-25
著者
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Golubovic Snezana
Faculty Of Electronic Engineering University Of Nis Beogradska
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Davidovic Vojkan
Faculty Of Electronic Engineering University Of Nis Beogradska
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Djoric-veljkovic Snezana
Faculty Of Technology University Of Nis
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Stojadinovic Ninoslav
Faculty Of Electronic Engineering University Of Nis Beogradska
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Dimitrijev Sima
Griffith School of Engineering, Griffith University, Nathan, Queensland 4111, Australia
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Dankovic Danijel
Faculty of Electronic Engineering, University of Niš, Aleksandra Medvedeva 14, 18000 Niš, Serbia
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Manić Ivica
Faculty of Electronic Engineering, University of Niš, Aleksandra Medvedeva 14, 18000 Niš, Serbia
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Manić Ivica
Faculty of Electronic Engineering, University of Niš, Aleksandra Medvedeva 14, 18000 Niš, Serbia
関連論文
- Turn-Around of Threshold Voltage in Gate Bias Stressed p-Channel Power Vertical Double-Diffused Metal–Oxide–Semiconductor Transistors
- Temperature and Gate Bias Effects on Gamma-Irradiated Al-Gate Metal-Oxide-Semiconductor Transistors
- Modeling of γ-Irradiation and Lowered Temperature Effects in Power Vertical Double-Diffused Metal-Oxide-Semiconductor Transistors