Temperature and Gate Bias Effects on Gamma-Irradiated Al-Gate Metal-Oxide-Semiconductor Transistors

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概要

• 論文の詳細を見る

• The annealing of irradiated Al-gate metal-oxide-semiconductor (MOS) transistors at elevated temperature (115℃), without gate bias for P-channel metal-oxide-semiconductor (PMOS) transistors, and with/without gate bias (+9 V) for N-channel metal-oxide-semiconductor (NMOS) transistors, has been investigated. The experimental data obtained are analyzed in terms of physicochemical and electrophysical processes responsible for creation of gate oxide charge and interface traps, as well as their anneal. The decrease of positive charge density in irradiated transistors during thermal annealing is caused by electrons tunneling from the silicon into the oxide. The rate of neutralization of positive centers depends on the irradiation dose level.

• 社団法人応用物理学会の論文
• 1994-02-15

著者

• Ristic G

  Fac. Electronic Engineering Nis Serbia Yug

• Ristic Goran

  Faculty Of Electronic Engineering Beogradska

• Pejovic M

  Fac. Electronic Engineering Nis Serbia Yug

• Pejovic Momcilo

  Faculty Of Electronic Engineering Beogradska

• GOLUBOVIC Snezana

  Faculty of Electronic Engineering, University of Nis

• ODALOVIC Milan

  Faculty of Natural Sciences, University of Pristina

• Odalovic Milan

  Faculty Of Natural Sciences University Of Pristina

• Golubovic S

  Univ. Nis Nis Yug

• Golubovic Snezana

  Faculty Of Electronic Engineering University Of Nis Beogradska

関連論文

• Turn-Around of Threshold Voltage in Gate Bias Stressed p-Channel Power Vertical Double-Diffused Metal–Oxide–Semiconductor Transistors
• Temperature and Gate Bias Effects on Gamma-Irradiated Al-Gate Metal-Oxide-Semiconductor Transistors
• Formative Time Determination in Nitrogen-Filled Tube Using Statistical Methods
• Modeling of γ-Irradiation and Lowered Temperature Effects in Power Vertical Double-Diffused Metal-Oxide-Semiconductor Transistors

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