ArF Photoresist Parameter Optimization for Mask Error Enhancement Factor Reduction
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概要
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The mask error enhancement factor (MEEF) is the best representative index for critical dimension (CD) variation in a wafer which is amplified by real specific mask CD variation. As already clarified in previous reports, MEEF is increased by reducing k1 (process ability index) or pattern pitch. The illumination system, just like lens aberration or stage defocus effects directly the MEEF value, but the leveling or species of a substrate and the resist performance are also strongly related to the MEEF value. In practice, when engineers set up the photoprocess for fabricating the miniaturized structures of current devices, they established minimum shot uniformity target such as the MEEF value within wafer uniformity and wafer-to-wafer uniformity, in addition to the usable depth of focus (UDOF) or exposure latitude (EL) margin. We examined MEEF reduction by checking the differences in resist parameters and attempted to correlate the results between experiment and simulation. Solid-C was used as the simulation tool. The target node is dense line/space pattern (L/S) of sub-80 nm and we used the same illumination conditions. We calculated MEEF values by comparing with the original mask uniformity using the optical parameters of each resist type. The normalized image log slope (NILS) showed us some points of the saturation value with pupil mesh points and the aberration is not considered. We used four different types of resist and changed resist optical properties (i.e., $n$, $k$ refractive index; $A$, $B$, and $C$ Dill exposure parameters). It is very difficult to measure the kinetic phenomenon, thus we chose the Fickian model in post exposure bake (PEB) and the Weiss model for development. In this paper, we suggest another direction of photoresist improvement by comparing the resist parameters with the MEEF values at different pitches.
- 2005-10-15
著者
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Oh Hye-keun
Applied Physics Department Hanyang University
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Lee Chang
Samsung Advanced Institute Of Technology Semiconductor Device Laboratory
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Oh Hye-Keun
Applied Physics Department, Hanyang University, Ansan 426-791, Korea
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Lee Chang
Samsung Electronics Co., San #16, Banwol-Ri, Taean-Eup, Hwasung, Gyeonggi-Do 445-701, Korea
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