Simulation of Three-Dimensional Stress in GaAs Microchannel Epitaxy Layer on Si Substrates

概要

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The stress in a GaAs vertical microchannel epitaxy (V-MCE) layer on Si was simulated using the finite element method. The stress in the V-MCE layer decreased with increasing distance from the heterointerface. In a thin V-MCE layer, tensile stress was produced by the difference in thermal contraction between GaAs and Si. The stress at the center of the top surface of the V-MCE layer rapidly decreased with increasing thickness of the layer ($H$). Also, the sign of the stress changed from tensile to compressive when $H$ exceeded a critical value. As $H$ increased further, the stress decreased, thus forming a peak in the compressive stress. The stress generally decreased whit increasing thickness of the V-MCE layer, but the stress canceled when the V-MCE layer reached a critical thickness in which the tensile stress was equal and opposite to the compressive stress from the bowing of the substrate. The simulation also gives the stress distribution in the V-MCE layer, which is very useful for optimizing V-MCE for device fabrication.
Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
2004-06-15