Memory efficient IFFT design for OFDM-based applications

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概要

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• In this paper, we propose a new memory efficient IFFT design method for OFDM-based applications, based on a signed integer mapping of three IFFT input signals which are composed of modulated data, pilot and null signals. The proposed method focuses on reducing the word size of memory in the first two stages of the single-path delay feedback (SDF) IFFT architectures since the first two stages require 75% of the overall memory. By Synopsys simulation of the first two stages of IFFT, it is shown that the proposed method achieves about 40% reduction in area and 44% reduction in power consumption compared with the previous work.

著者

• CHUNG Jin-Gyun

  Division of Electronics & Information Engr., Chonbuk National University

• Jang In-Gul

  Electronics and Telecommunications Research Institute (ETRI)

• Cho Kyung-Ju

  Department of Electronic Engineering, Wonkwang University

• Kim Hwan-Yong

  Department of Electronic Engineering, Wonkwang University

• Chung Jin-Gyun

  Division of Electronic Engineering, Chonbuk National University

関連論文

• CSD-Based Programmable Multiplier Design for Predetermined Coefficient Groups
• Fixed-Width Group CSD Multiplier Design
• Memory Size Reduction Technique of SDF IFFT Architecture for OFDM-Based Applications
• Memory efficient IFFT design for OFDM-based applications

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