A self-biasing class-E power amplifier for 5-GHz constant envelope modulation system
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概要
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This paper describes the design of 5-GHz fully integrated self-biasing power amplifier (PA) for wireless transmitter applications in a 0.18-µm CMOS technology. The proposed class-E PA employs the cascode topology with a self-biasing technique to reduce device stress. Three cascaded class-D driver amplifiers are used to actualize the sharp switching at the class-E power stage. All device components are integrated on chip and the chip area is 1.0×1.3mm2. The measurement results indicate that the PA delivers 16.4dBm output power and 35.4% power-added efficiency with 2.3V power supply voltage into a 50Ω load.
著者
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Yoshida Keiji
Graduate School Of Information Science And Electrical Engineering Kyushu Unversity
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Pokharel Ramesh
Center for Japan-Egypt Cooperation in Science and Technology, Kyushu University
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Kanaya Haruichi
Graduate School of Information Sciences and Electrical Engineering, Kyushu University
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Kanaya Haruichi
Graduate School of Information Science and Electrical Engineering, Kyushu Univ.
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Kanemoto Daisuke
Graduate School of Information Science and Electrical Engineering, Kyushu Univ.
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Yamashita Yuki
Graduate School of Information Sciences and Electrical Engineering, Kyushu University
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