Trapezoidal approximation for on-current modeling of 45-nm non-rectilinear gate shape

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概要

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• In this paper, a simple and accurate modeling technique that analyzes a non-rectilinear gate (NRG) transistor with a simplified trapezoidal approximation method is proposed. To approximate a non-rectangular channel shape into a trapezoidal shape, we extract three geometry-dependent parameters from post-lithographic patterns: the minimum channel length from the slices (L<I>min</I>), maximum channel length from the slices (L<I>max</I>), and effective channel width (W<I>eff</I>). We slice the NRG transistor gate along its width, sort these slices according to their sizes, and then use trapezoidal approximation. A physics-based technology computer aided design (TCAD) simulation is used to verify our model in a typical 45-nm process. The developed model requires fewer computations and less runtime as compared to the previous approaches. Therefore, a full chip post-lithography analysis (PLA) becomes feasible.

著者

• RYU Myunghwan

  UNIST

• KIM Youngmin

  UNIST

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• Trapezoidal approximation for on-current modeling of 45-nm non-rectilinear gate shape
• TSV Geometrical Variations and Optimization Metric with Repeaters for 3D IC

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