High Performance Velocity Estimation for Controllers with Short Processing Time by FPGA
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概要
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In motion control, the number of controllers based on field programmable gate arrays (FPGAs) has increased in recent years owing to the inherent short sampling time. At present, the most commonly implemented velocity estimation methods are the M and T methods. The proposed velocity estimation method reduces the calculation time by eliminating the division operation and prevents reduction in resolution owing to a short sampling time. In addition, the proposed method shows a high performance across a wide range of velocities. Program implementation in FPGAs has a low computational cost and a high calculation speed. The conventional methods present some difficulties in programming using FPGAs owing to the divider implementation. The validity of the proposed method was tested using a velocity controller based on a disturbance observer.
著者
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Ohishi Kiyoshi
Department Of Electrical Engineering Nagaoka University Of Technology
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Mitsantisuk Chowarit
Department Of Electrical Engineering Nagaoka University Of Technology
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Nandayapa Manuel
Department of Electrical Engineering, Nagaoka University of Technology
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