CMRF: a Configurable Matrix Register File for accelerating matrix operations on SIMD processors
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概要
- 論文の詳細を見る
Mapping matrix operations on SIMD processors brings a large amount of data rearrangement that decrease the system performance. This paper proposes a Configurable Matrix Register File (CMRF) that supports both row-wise and column-wise accesses. The CMRF can be dynamically configured into different operating modes in which one or several sub-matrices can be accessed in parallel. Experimental results show that, compared with the traditional Vector Register File (VRF) and the MRF, the CMRF can respectively achieve about 2.21x and 1.6x average performance improvement. Compared with TMS320C64x+, our SIMD processor can achieve about 5.65x to 7.71x performance improvement by employing the CMRF.
著者
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LIU Wei
School of Electronic, Information and Electrical Engineering, Shanghai Jiao Tong University
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Chen Shuming
School of Computer, National University of Defense Technology
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ZHANG Kai
School of Computer, National University of Defense Technology
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Wang Yaohua
School of Computer, National University of Defense Technology
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Chen Hu
School of Computer, National University of Defense Technology
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Chen Xiaowen
School of Computer, National University of Defense Technology
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Liu Sheng
School of Computer, National University of Defense Technology
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Liu Wei
School of Computer, National University of Defense Technology
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Liu Wei
School of Aeronautics and Astronautics, Shanghai Jiao Tong University
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