NAND回路に基づく論理回路学習支援システムの一改良

概要

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We have developed an educational support system for NAND-based logic circuits. However, there exists some redundancy with respect to the NAND-circuit generation algorithm which is the main part of the system. Hence, in this paper, we try to improve the system. First, we explain how a NAND circuit is generated for the case of four variables using a concrete example. Next, we discuss how to reduce (1) the number of input-variable lines to NAND gates and (2) the number of NAND gates in the circuit. The newly developed system was compared with the old one. For the purpose, we set the number of variables n to 5∼10 and then generated ten functions with truth-table density r=0.6 for each case. As a result, reduction by 30 percent was realized with respect to (1) and some reduction was also observed with respect to (2).
社団法人電気学会の論文