On Delay Test Quality for Test Cubes
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概要
- 論文の詳細を見る
This paper proposes a method to compute delay values in 3-valued fault simulation for test cubes which are test patterns with unspecified values (Xs). Because the detectable delay size of each fault by a test cube is not fixed before assigning logic values to the Xs in the test cube, the proposed method only computes a range of the detectable delay values of the test patterns covered by the test cubes. By using the proposed method, we derive the lowest and the highest test quality of test patterns covered by the test cubes. Furthermore, we also propose a GA (genetic algorithm)-based method to generate fully specified test patterns with high test quality from test cubes. Experimental results for benchmark circuits show the effectiveness of the proposed methods.
- 一般社団法人情報処理学会の論文
- 2010-08-16
著者
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Xiaoqing Wen
Kyushu Institute of Technology
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Shinji Oku
Kyushu Institute of Technology
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Seiji Kajihara
Kyushu Institute of Technology
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Yasuo Sato
Kyushu Institute of Technology | JST, CREST
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Kohei Miyase
Kyushu Institute of Technology | JST, CREST
関連論文
- Estimation of Delay Test Quality and Its Application to Test Generation
- On Delay Test Quality for Test Cubes
- Delay Testing: Improving Test Quality and Avoiding Over-testing