Synthesis Method of All Low-Voltage CMOS Instantaneous-Companding Log Domain Integrators(<Special Section>Analog Circuit Techniques and Related Topics)
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概要
- 論文の詳細を見る
This paper proposes a synthesis method of all low-voltage CMOS instantaneous-companding log domain integrators. The method is based on the exhaustive search of all low-voltage CMOS instantaneous-companding log domain integrators. All the integrators are derived from a general block diagram. A function of each block can be realized by any of a family of circuits and elemental circuits chosen from such families are combined to build an integrator. It is clarified that each family contains a few circuit topologies. All topologies of integrators including new ones are obtained from combinational procedure. Comparing characteristics of all generated integrators, ones satisfying required performances are found out.
- 社団法人電子情報通信学会の論文
- 2007-02-01
著者
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WADA Kazuyuki
Department of Information and Computer Sciences, Toyohashi University of Technology
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Tadokoro Yoshiaki
Department Of Information And Computer Sciences/intelligent Sensing System Research Center Toyohashi
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Tadokoro Yoshiaki
Department Of Information And Computer Sciences Toyohashi University Of Technology
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Wada Kazuyuki
Department Of Information And Computer Sciences/intelligent Sensing System Research Center Toyohashi
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Wada Kazuyuki
Department Of Information And Computer Sciences Toyohashi University Of Technology:intelligent Sensi
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AKITA Ippei
Graduate School of Electronic and Information Engineering, Toyohashi University of Technology
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Akita Ippei
Graduate School Of Electronic And Information Engineering Toyohashi University Of Technology
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Wada Kazuyuki
Department Of Information And Computer Sciences Toyohashi University Of Technology Toyohashishi
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