Electron Trapping and Interface State Generation in PMOSFET's: Results from Gate Capacitance

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概要

• 論文の詳細を見る

• Significant generation of hot-carrier induced donor and acceptor interface states in PMOSFET's is observed for the first time from gate-to-drain capacitance C^s_<gd>*. Plotting the changcc ΔC^s_<gd>* against gate bias reveals two peaks, attributed to donor and acceptor states. A voltage can the drain displaces the donor peak by approximately the amount of the applied voltage, but the acceptor peak shifts by a fixed amount.

• 社団法人応用物理学会の論文
• 1993-10-01

著者

• LING C.

  Department of Electrical Enginecering, National Universiry of Singapore

関連論文

• Identification of Fixed and Interface Trap Charges in Hot-Carrier Stressed Metal Oxide Semiconductor Field Effect Transistors (MOSFET's) through Ultraviolet Light Anneal and Gate Capacitance Measurements
• Electron Trapping and Interface State Generation in PMOSFET's: Results from Gate Capacitance

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