End-Point Detection Method in Etch-Back Planarization Process for Josephson Integrated Circuits

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概要

• 論文の詳細を見る
• 社団法人応用物理学会の論文
• 1991-02-01

著者

• Hidaka Mutsuo

  Fundamental Research Laboratories Nec Corporation

• Inoue Takashi

  Fundamental Research Laboratories, NEC Corporation

• Nagasawa Shuuichi

  Fundamental Research Laboratories, NEC Corporation

• Nagasawa Shuuichi

  Fundamental Research Laboratories Nec Corporation

• Inoue Takashi

  Fundamental Research Laboratories Nec Corporation

関連論文

• End-Point Detection Method in Etch-Back Planarization Process for Josephson Integrated Circuits
• Fabrication Processes for High-T_c Superconducting Integrated Circuits Based on Edge-Type Josephson Junctions(Special Issue on Superconductive Electron Devices and Their Applications)
• A High-Tc Superconductor Josephson Sampler (Special Issue on Basic Properties and Applications of Superconductive Electron Devices)

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