Circuit and Functional Design Technologies for 2 Mb VRAM (Special Issue on LSI Memories)
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概要
- 論文の詳細を見る
Four circuit techniques and a layout design scheme were proposed to realize a 2 Mb VRAM used 0.8 μm technology. They are the enhanced circuit technologies for high speed operation, the functional circuit design and the effective repair schemes for a VRAM, the low power consumption techniques to active and standby mode and a careful layout design scheme realizing high noise immunity. Using these design techniques, a 2 Mb VRAM is suitable for the graphics application of a 512×512×8 pixels basis screen, with a clear mode of 4.6 GByte / sec and a 4-multi column write mode of 400 MByte / sec, even using the same 0.8 μm technology as the previous VRAM (1 Mb) was realized.
- 社団法人電子情報通信学会の論文
- 1993-11-25
著者
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Matsumoto M
Device Development Center Hitachi Ltd.
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Sato Katsuyuki
Device Development Center, Hitachi Ltd.
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Ogata Masahiro
Hitachi Vlsi Engineering Corp.
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Matsumoto Miki
Device Development Center, Hitachi Ltd.
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Hamamoto Ryouta
Device Development Center, Hitachi Ltd.
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Manita Kiichi
Hitachi VLSI Engineering Corp.
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Okada Terutaka
Hitachi VLSI Engineering Corp.
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Sakai Yuji
Device Development Center, Hitachi Ltd.
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Oishi Kanji
Device Development Center, Hitachi Ltd.
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Yamamura Masahiro
Semiconductor & Integrated Circuits Div., Hitachi Ltd.
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Yamamura Masahiro
Semiconductor & Integrated Circuits Div. Hitachi Ltd.
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Sakai Y
Osaka Univ. Suita‐shi Jpn
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Sakai Yuji
Device Development Center Hitachi Ltd.
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Oishi Kanji
Device Development Center Hitachi Ltd.
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Sato Katsuyuki
Device Development Center Hitachi Ltd.
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Hamamoto Ryouta
Device Development Center Hitachi Ltd.
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Matsumoto Miki
Device Development Center Hitachi, Ltd.
関連論文
- An Effective Defect-Repair Scheme for a High Speed SRAM (Special Issue on LSI Memories)
- Circuit and Functional Design Technologies for 2 Mb VRAM (Special Issue on LSI Memories)
- A Synchronous DRAM with New High-Speed I/O Lines Method for the MultiMedia Age