Analysis of the Trends in Logic Synthesis (Special Issue on Synthesis and Verification of Hardware Design)

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概要

• 論文の詳細を見る

• This paper tends to analyze the trends of the research in logic synthesis. The first part is devoted to an expertise of the efficiency of factorization methods developed during the last decade and to the proposal of dedicated methods for complex logic blocks. The second part shows the importance of Binary Decision Diagrams as representation of Boolean functions. Their use in the technology mapping phase of multiplexor based FPGAs in an industrial tool is taken as illustration.

• 社団法人電子情報通信学会の論文
• 1993-09-25

著者

• Saucier Gabriele

  Institut National Polytechnique de Grenoble

• Saucier Gabriele

  Institut National Polytechnique De Grenoble/csi

関連論文

• FOREWORD (Special Issue on Synthesis and Verification of Hardware Design)
• ASYL-SdF: A Synthesis Tool for Dependability in Controllers (Special Issue on Synthesis and Verification of Hardware Design)
• Analysis of the Trends in Logic Synthesis (Special Issue on Synthesis and Verification of Hardware Design)

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