An Exact Minimization of AND-EXOR Expressions Using Encoded MRCF (Special Section on VLSI Design and CAD Algorithms)

スポンサーリンク

概要

• 論文の詳細を見る

• In this paper, an exact-minimization method for an AND-EXOR expression (ESOP) using 0-suppressed binary decision diagrams (ZBDDs) is considered. The proposed method is an improvement of Sasao's MRCF-based method. From exper-imenta1 results, it is shown that required ZBDD size is reduced to 1/3 in the best case compared with the MRCF-based method.key words: logic optimization, exact minimization of AND-EXOR expressions, Helliwell equation, 0-suppressed binary deci-sion diagrams

• 社団法人電子情報通信学会の論文
• 1996-12-25

著者

• Ochi Hiroyuki

  The Faculty Of Information Sciences Hiroshima City University

• OCHI Hiroyuki

  the Faculty of Information Sciences,Hiroshima City University

関連論文

• Datapath-Layout-Driven Design for Low-Power FPGA Implementation (特集:電子システムの設計技術と設計自動化)
• ASAver.1: An FPGA-Based Education Board for Computer Architecture/System Design
• A Zero-Suppressed BDD Package with Pruning and Its Application to GRM Minimization (Special Section on VLSI Design and CAD Algorithms)
• An Algorithm for Generating Generic BDDs (Special Section on VLSI Design and CAD Algorithms)
• An Exact Minimization of AND-EXOR Expressions Using Encoded MRCF (Special Section on VLSI Design and CAD Algorithms)

スポンサーリンク