Diagnosing Binary Content Addressable Memories with Comparison and RAM Faults(Memory Testing)(<Special Section>Test and Verification of VLSI)

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概要

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• Most of system-on-chips (SOCs) have many memory cores. Diagnosis is often used to improve the yield of memories. Memory cores usually represent a significant portion of the chip area and dominate the yield of the chip. Memory diagnosis thus is one of key techniques for improving the yield and quality of SOCs. Content addressable memories (CAMs) are important components in many SOCs. In this paper we propose a three-phase diagnosis procedure for binary CAMs (BCAMs). The user can distinguish different types of BCAM-specific comparison and RAM faults and locate the faulty cells with the procedure. A March-like fault identification algorithm is also proposed. The algorithm can distinguish different types of faults-including typical RAM faults and BCAM-specific comparison faults. The algorithm requires 15N Read/Write operations and 2(N + B) Compare operations for an N × 5-bit BCAM. Analysis results show that the algorithm has 100% diagnostic resolution for the target faults.

• 社団法人電子情報通信学会の論文
• 2004-03-01

著者

• Li Jin-fu

  Department Of Electrical Engineering National Central University

関連論文

• Efficient Block-Level Connectivity Verification Algorithms for Embedded Memories(Test)(VLSI Design and CAD Algorithms)
• An Efficient Diagnosis Scheme for RAMs with Simple Functional Faults(Memory Design and Test,VLSI Design and CAD Algorithms)
• Diagnosing Binary Content Addressable Memories with Comparison and RAM Faults(Memory Testing)(Test and Verification of VLSI)

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