Layout-Based Detection Technique of Line Pairs with Bridging Fault Using I_<DDQ>(Fault Detection)(<Special Section>Test and Verification of VLSI)

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概要

• 論文の詳細を見る

• Abnormal I_<DDQ> (Quiescent power supply current) is the signal to indicate the existence of physical damage which includes the between circuit lines. Using this signal, a CAD-based line pairs with bridging fault (LBFs) detection technique has been developed to enhance the manufacturing yield of advanced logic LSI with scaled-down structure and multi-metal layers. The proposed technique progressively narrows the doubtful LBFs down by logic information and layout structure. This tech nique, quickly handed, is applied to draw down the distribution chart of bridging fault portion on wafer, the feature of which chart is fed back to manufacturing process and layout design.

• 社団法人電子情報通信学会の論文
• 2004-03-01

著者

• Sanada Masaru

  Analysis Technology Development Division Nec Electronics Corporation

関連論文

• A CAD-Based Approach to Fault Diagnosis of CMOS LSI with Single Fault Using Abnormal Iddq (Special Section on VLSI Design and CAD Algorithms)
• Layout-Based Detection Technique of Line Pairs with Bridging Fault Using I_(Fault Detection)(Test and Verification of VLSI)

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