Design and Fault Masking of Two-Level Cellular Arrays on Multiple-Valued Logic
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概要
- 論文の詳細を見る
In this paper, we discuss problems in design and fault masking of multiple-valued cellular arrays where basic cells having simple switch functions are arranged iteratively. The stuck-at faults of switch cells are assumed to be fault models. First, we introduce a universal single-level array and derive the ratio of the number of single faults whose influence can be masked to the total number of single faults. Next, we propose a universal two-level array that outputs correct values even if single faults occur in it and derive the ratio of the number of double faults whose influence can be masked compared to the total number of double faults. By evaluating the universal single-level array and the universal two-level array from the view-points of design and fault masking, we show that the latter is superior to the former. Finally, we compare our universal two-level array with formerly presented arrays in order to demonstrate the advantages of our universal two-level array.
- 社団法人電子情報通信学会の論文
- 1996-10-25
著者
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HATA Yutaka
Graduate School of Engineering, University of Hyogo
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HATA Yutaka
Department of Computer Engineering, Himeji Institute of Technology
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Hata Y
Graduate School Of Engineering University Of Hyogo
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Hata Yutaka
Deparment Of Computer Engineering Himeji Institute Of Technology:bisc Group Computer Science Divisio
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KAMIURA Naotake
Department of Computer Engineering, Himeji Institute of Technology
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YAMATO Kazuharu
Department Economics & Information Science, Hyogo University
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Kamiura N
Graduate School Of Engineering University Of Hyogo
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Kamiura Naotake
Department Of Computer Engineering Himeji Institute Of Technology
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Yamato K
The Author Is With The Department Of Economics & Information Science Hyogo University
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Hata Y
Himeji Institute Of Technology Japan
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Yamato Kazuharu
The Author Is With The Department Of Economics & Information Science Hyogo University
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