Kamiura N | Graduate School Of Engineering University Of Hyogo
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概要
関連著者
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Kamiura N
Graduate School Of Engineering University Of Hyogo
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HATA Yutaka
Graduate School of Engineering, University of Hyogo
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Hata Y
Graduate School Of Engineering University Of Hyogo
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Matsui N
Graduate School Of Engineering University Of Hyogo
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Hata Y
Himeji Institute Of Technology Japan
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ISOKAWA Teijiro
Graduate School of Engineering, University of Hyogo
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Isokawa Teijiro
Graduate School Of Engineering University Of Hyogo
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Yamato K
The Author Is With The Department Of Economics & Information Science Hyogo University
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Yamato Kazuharu
The Author Is With The Department Of Economics & Information Science Hyogo University
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Ohtsuka Akitsugu
Yamato Scale Co. Ltd.
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Hata Yutaka
Faculty Of Engineering Himeji Institute Of Technology
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Kamiura Naotake
Faculty of Engineering, Himeji Institute of Technology
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Yamato Kazuharu
Faculty of Engineering, Himeji Institute of Technology
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OHTSUKA Akitsugu
Division of Computer Engineering, University of Hyogo
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KAMIURA Naotake
Division of Computer Engineering, University of Hyogo
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ISOKAWA Teijiro
Division of Computer Engineering, University of Hyogo
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MATSUI Nobuyuki
Division of Computer Engineering, University of Hyogo
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Yamato Kazuharu
Faculty Of Engineering Himeji Institute Of Technology
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Yamato Kazuharu
Faculty of Engineering ,Himeji Institute of Technology
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HATA Yutaka
Department of Computer Engineering, Himeji Institute of Technology
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Hata Yutaka
Deparment Of Computer Engineering Himeji Institute Of Technology:bisc Group Computer Science Divisio
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Hata Yutaka
The Authors Are With Department Of Computer Engineering Himeji Institute Of Technology : The Author
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KAMIURA Naotake
The authors are with the Department of Computer Engineering, Himeji Institute of Technology
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MATSUI Nobuyuki
The authors are with the Department of Computer Engineering, Himeji Institute of Technology
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KAMIURA Naotake
Department of Computer Engineering, Himeji Institute of Technology
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YAMATO Kazuharu
Department Economics & Information Science, Hyogo University
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Kamiura Naotake
Department Of Computer Engineering Himeji Institute Of Technology
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Kamiura Naotake
The Authors Are With Department Of Computer Engineering Himeji Institute Of Technology
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TANII Hirotsugu
Fujitsu Ten Ltd.
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Satoh Hidetoshi
Faculty Of Engineering Himeji Institute Of Technology
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Minamide Naoki
Sysmex Corporation
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TANIGUCHI Yasuyuki
The authors are with the Department of Computer Engineering, Himeji Institute of Technology
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ISOKAWA Teijiro
The authors are with the Department of Computer Engineering, Himeji Institute of Technology
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YAMATO Kazuharu
The author is with the Department of Economics & Information Science, Hyogo University
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KOEDA Noriaki
Sysmex Corporation
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KAMIURA Naotake
Graduate School of Engineering, University of Hyogo
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MATSUI Nobuyuki
Graduate School of Engineering, University of Hyogo
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TANII Hirotsugu
Division of Computer Engineering, University of Hyogo
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OKAMOTO Minoru
SYSMEX CORPORATION
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KAMIURA Naotake
The Division of Computer Engineering, Department of Electrical Engineering and Computer Sciences, Gr
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TOMITA Masashi
The Division of Computer Engineering, Department of Electrical Engineering and Computer Sciences, Gr
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ISOKAWA Teijiro
The Division of Computer Engineering, Department of Electrical Engineering and Computer Sciences, Gr
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MATSUI Nobuyuki
The Division of Computer Engineering, Department of Electrical Engineering and Computer Sciences, Gr
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Tomita Masashi
The Division Of Computer Engineering Department Of Electrical Engineering And Computer Sciences Grad
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Taniguchi Yasuyuki
The Authors Are With The Department Of Computer Engineering Himeji Institute Of Technology
著作論文
- A Learning Algorithm with Activation Function Manipulation for Fault Tolerant Neural Networks
- On a Weight Limit Approach for Enhancing Fault Tolerance of Feedforward Neural Networks
- Design of Multiple-Valued Programmable Logic Array with Unary Function Generators
- Design and Fault Masking of Two-Level Cellular Arrays on Multiple-Valued Logic
- On Ternary Cellular Arrays Designed from Ternary Decision Diagrams
- Design of Repairable Cellular Arrays on Multiple-Valued Logic
- Design of a Multiple-Valued Cellular Array (Special Issue on Multiple-Valued Integrated Circuits)
- Classification for data of hematopoietic tumor patients with fast block-matching-based self-organizing map learning in dynamic environments (特集 医用システム)
- Self-Organizing Map Based Data Detection of Hematopoietic Tumors(Nonlinear Problems)
- Self-Organizing Map Based on Block Learning(Nonlinear Problems)
- A Self-Organizing Map Approach for Detecting Confusion between Blood Samples
- On Fault-Tolerant Fuzzy Controllers Based on Shifting Fuzzy Variables