Design of Multiple-Valued Programmable Logic Array with Unary Function Generators
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概要
- 論文の詳細を見る
This paper describes the benefit of utilizing the unary function generators in a multiple-valued Programmable Logic Array (PLA). We will clarify the most suitable PLA structure in terms of the array size. The multiple-valued PLA considered here has a structure with two types of function generators (literal and unary function generators), a first-level array and a second-level array. On investigating the effectiveness to reduce the array size, we can pick up four form PLAs: MAX-of-TPRODUCT form, MIN-of-TSUM form, TSUM-of-TPRODUCT form and TPRODUCT-of-TSUM form PLAs among possible eight form PLAs constructing from the MAX, MIN, TSUM and TPRODUCT operators. The upper bound of the array sizes with v UGs is derived as (「log_2p〓pv+p(n-v)+1)p^<n-1> to realize any n-variable p-valued function. Next, experiments to derive the smallest array sizes are done for 10000 randomly generated functions and 21 arithmetic functions. These results conclude that MAX-of-TPRODUCT form PLA is the most useful in reducing the array size among the four form PLAs.
- 社団法人電子情報通信学会の論文
- 1999-09-25
著者
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HATA Yutaka
Graduate School of Engineering, University of Hyogo
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HATA Yutaka
Department of Computer Engineering, Himeji Institute of Technology
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Hata Y
Graduate School Of Engineering University Of Hyogo
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Hata Yutaka
Deparment Of Computer Engineering Himeji Institute Of Technology:bisc Group Computer Science Divisio
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KAMIURA Naotake
Department of Computer Engineering, Himeji Institute of Technology
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YAMATO Kazuharu
Department Economics & Information Science, Hyogo University
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Kamiura N
Graduate School Of Engineering University Of Hyogo
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Kamiura Naotake
Department Of Computer Engineering Himeji Institute Of Technology
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Yamato K
The Author Is With The Department Of Economics & Information Science Hyogo University
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Hata Y
Himeji Institute Of Technology Japan
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Yamato Kazuharu
The Author Is With The Department Of Economics & Information Science Hyogo University
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