A Delay Locked Loop Circuit with Mixed Mode Phase Tuning Technique

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概要

• 論文の詳細を見る

• This paper describes a DLL(Delay Locked Loop) circuit with the mixed-mode phase tuning method. The circuit accomplishes unlimited phase shift and accurate phase alignment through the coarse and fine phase tuning technique. It is based on a dual delay locked loop structure. The main loop is for generating coarsely spaced clocks and the second loop is for fast and accurate phase tuning with digital and analog phase detection. Simulations show that this circuit has 360 degree phase shift capability and can resolve 10 ps phase error using 0.6 μm CMOS technology.

• 社団法人電子情報通信学会の論文
• 2000-09-25

著者

• Kang Jin-Ku

  School of Electronics Engineering, Inha University

• Yoon Kwang

  School Of Electrical And Computer Engineering Inha University

• Kang Jin-ku

  School Of Electrical And Computer Engineering Inha University

• SONG Yeo-San

  School of Electrical and Computer Engineering, Inha University

• Song Yeo-san

  School Of Electrical And Computer Engineering Inha University

関連論文

• SSCG with Hershey-Kiss modulation profile using Dual Sigma-Delta modulators
• A Delay Locked Loop Circuit with Mixed Mode Phase Tuning Technique
• All Digital DLL with Three Phase Tuning Stages(Papers Selected from 2003 International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC 2003))
• A 4Gb/s Adaptive FFE/DFE Receiver with a Data-Dependent Jitter Measurement

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