Selectable Logarithmic/Linear Response Active Pixel Sensor Cell with Reduced Fixed-Pattern-Noise Based on Dynamic Threshold MOS Operation

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概要

• 論文の詳細を見る

• A selectable logarithmic/linear response active pixel sensor cell with reduced fixed-pattern-noise is proposed. It is composed of four dynamic threshold metal-semiconductor-oxide field-effect transistors (DTMOSs), which have inherently fewer characteristic fluctuations than conventional bulk counterparts. Therefore this proposed active pixel sensor cell is expected to reduce fixed-pattern-noise as compared with that of a device composed of bulk metal-oxide-semiconductor field effect transistors (MOSFETs) without any external noise reduction circuitry particularly in the logarithmic response mode. The effectiveness of the proposed sensor cell is partly experimentally verified using test devices that simulate the readout portion of the proposed sensor cell.

• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2005-04-15

著者

• Terauchi Mamoru

  Dept. Of Computer Engineering Fac. Of Information Sciences Hiroshima City University

• Terauchi Mamoru

  Department Of Computer Engineering Faculty Of Information Science Hiroshima City University

• HAMASAKI Atsushi

  Graduate School of Information Sciences, Hiroshima City University

• Suketa Arinori

  Graduate School of Information Sciences, Hiroshima City University, 3-4-1 Ozuka-higashi, Asaminami-k

• Hamasaki Atsushi

  Dept. Of Computer Engineering Graduate School Of Information Sciences Hiroshima City University

• Hamasaki Atsushi

  Graduate School Of Information Sciences Hiroshima City University

• Suketa Arinori

  Graduate School of Information Sciences, Hiroshima City University

関連論文

• A Novel Operation Scheme for Realizing Combined Linear-Logarithmic Response in Photodiode-Type Active Pixel Sensor Cells
• Selectable Logarithmic/Linear Response Active Pixel Sensor Cell with Reduced Fixed-Pattern-Noise Based on Dynamic Threshold MOS Operation
• A Selectable Logarithmic / Linear Response Active Pixel Sensor Cell with Reduced Fixed-Pattern-Noise Based on DTMOS Operation
• A 'Self-Body-Biased' SOI MOSFET: A Novel Body-Voltage-Controlled SOI MOSFET for Low Voltage Applications
• SOI SRAM/DRAM Cells for 0.5 V Operation
• A Wide-Dynamic-Range Photodiode-Type Active Pixel Sensor Cell with Seamlessly Combined Logarithmic–Linear–Logarithmic Response
• Novel Operation Scheme for Realizing Combined Linear-Logarithmic Response in Photodiode-Type Active Pixel Sensor Cells
• A 'Self-Body-Biased' SOI MOSFET: A Novel Body-Voltage-Controlled SOI MOSFET for Low Voltage Applications

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