Practical Design and Modeling Procedure of Test Structures for Microwave Bare-Chip Devices

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概要

• 論文の詳細を見る
• 2004-01-01

著者

• SHIMASUE Masanori

  MODECH Inc.

• AOKI Hitoshi

  MODECH Inc.

関連論文

• Gate-to-Bulk Overlap Capacitance Extraction and Its Circuit Verification(Analog Circuit and Device Technologies)
• Gate Capacitance Analysis of Multi-finger MOSFETs for RF Applications
• Practical Design and Modeling Procedure of Test Structures for Microwave Bare-Chip Devices
• Practical Design and Modeling Procedure of Test Structures for Microwave Bare-Chip Devices(Microwaves, Millimeter-Waves)

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