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Research Department 1, Semiconductor Leading Edge Technologies, Inc. (SELETE) | 論文
- Ni-Salicided Poly-Si/poly-SiGe-Layered Gate Technology for 65-nm-node CMOSFETs
- Area-Selective Post-Deposition Annealing Process Using Flash Lamp and Si Photoenergy Absorber for Metal/High-$k$ Gate Metal–Insulator–Semiconductor Field-Effect Transistors with NiSi Source/Drain
- Ni-Salicided Poly-Si/poly-SiGe-Layered Gate Technology for 65-nm-node CMOSFETs