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Dept. of Computer Science, Yonsei University | 論文
- A Way Enabling Mechanism Based on the Branch Prediction Information for Low Power Instruction Cache
- Low-Power Embedded Processor Design Using Branch Direction
- Floating Point Adder/Subtractor Performing IEEE Rounding and Addition/Subtraction in Parallel
- Efficient Transmission Policies for Multimedia Objects Structured by Pro-Defined Scenarios
- Cooperative Cache System : A Low Power Cache System for Embedded Processors(Digital,Low-Power, High-Speed LSIs and Related Technologies)
- Peak Load-Based Congestion Control Scheme in Optical Burst Switching Networks(Internet Technology VI)