スポンサーリンク
Department of Computer Engineering, Science and Research Branch, Islamic Azad University | 論文
- On the design of low power 1-bit full adder cell
- Fully parallel comparator for the moduli set {2n,2n-1,2n+1}
- High speed reverse converter for new five-moduli set {2n, 22n+1-1, 2n/2-1, 2n/2+1, 2n+1}
- Efficient RNS to binary converters for the new 4-moduli set {2n, 2n+1-1, 2n-1, 2n-1-1}
- A new five-moduli set for efficient hardware implementation of the reverse converter