A new five-moduli set for efficient hardware implementation of the reverse converter

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概要

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• In this paper, we propose an efficient hardware implementation of the reverse converter for the new five-moduli set {2n, 2n/2-1, 2n/2+1, 2n+1, 22n-1-1} for even n. The converter has a two-level architecture, and is based on combination of new Chinese remainder theorem 1 (New CRT-I) and mixed-radix conversion (MRC). The presented reverse converter has lower hardware requirements, and results in a significant reduction in the conversion delay, compared to the reverse converter of the latest introduced five-moduli set {2n-1, 2n, 2n+1, 2n-1-1, 2n+1-1} that has the same dynamic range as the proposed five-moduli set.

著者

• Navi Keivan

  Department Of Electrical And Computer Engineering Shahid Beheshti University

• Dadkhah Chitra

  Department Of Electrical Engineering Khaje Nasir Toosi University Of Technology

• Molahosseini Amir

  Department of Computer Engineering, Science and Research Branch, Islamic Azad University

関連論文

• Efficient MRC-Based Residue to Binary Converters for the New Moduli Sets {2^,2^n-1,2^-1} and {2^,2^n-1,2^-1}
• An improved reverse converter for the moduli set {2n-1, 2n, 2n+1, 2n+1-1}
• Efficient RNS to binary converters for the new 4-moduli set {2n, 2n+1-1, 2n-1, 2n-1-1}
• A new five-moduli set for efficient hardware implementation of the reverse converter

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