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Communication Systems Laboratory, Mitsubishi Electric Corporation | 論文
- Low Power Dissipation GaAs DCFL 2.5 Gbps 16-bit Multiplexer/Demultiplexer LSIs
- A Shared Multibuffer Architecture for High-Speed ATM Switch LSIs (Special Issue on New Architecture LSIs)
- A Fully Integrated 6.25% Pull-in Range Digital PLL for ISDN Primary Rate Interface LSI
- An Efficient Self-Timed Queue Architecture for ATM Switch LSIs (Special Issue on Multimedia, Analog and Processing LSIs)
- Selectable Traffic Control Scheme for Burst Data Transmission Using TCP/IP on ATM Networks
- Bandwidth Allocation for Connectionless Service in Private Networks Based on ATM Technology (Special Issue on Future Private Networks)