ISHIHARA Tohru | VLSI Design and Education Center, the University of Tokyo

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• 同名の論文著者
• VLSI Design and Education Center, the University of Tokyoの論文著者

VLSI Design and Education Center, the University of Tokyo | 論文

• A 1.76mW, 100Mbps Impulse Radio UWB Receiver with Multiple Sampling Correlators Eliminating Need for Phase Synchronization in 65-nm CMOS
• A 100Mbps, 4.1pJ/bit Threshold Detection-Based Impulse Radio UWB Transceiver in 90nm CMOS
• An Outside-Rail Opamp Design Relaxing Low-Voltage Constraint on Future Scaled Transistors(Analog and Communications,Low-Power, High-Speed LSIs and Related Technologies)
• A 1.76mW, 100Mbps Impulse Radio UWB Receiver with Multiple Sampling Correlators Eliminating Need for Phase Synchronization in 65-nm CMOS
• EMI Camera LSI (EMcam) with On-Chip Loop Antenna Matrix to Measure EMI Noise Spectrum and Distribution

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