Matsubara Yoshihisa | Semiconductor Leading Edge Technologies, Inc., 16-1 Onogawa, Tsukuba, Ibaraki 305-8569, Japan
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- Semiconductor Leading Edge Technologies, Inc., 16-1 Onogawa, Tsukuba, Ibaraki 305-8569, Japanの論文著者
Semiconductor Leading Edge Technologies, Inc., 16-1 Onogawa, Tsukuba, Ibaraki 305-8569, Japan | 論文
- Impact of Gate Metal-Induced Stress on Performance Modulation in Gate-Last Metal–Oxide–Semiconductor Field-Effect Transistors
- High-Etching-Selectivity Barrier SiC ($k
- Trench Sidewall Elimination Effect on Line-to-Line Leakage Current in Scalable Porous Silica ($k= 2.1$)/Cu Interconnect Structure
- Effect of Pattern Layout and Dissolved Oxygen in CO2 Rinse Water on Cu Corrosion during Post-Etch Cleaning
- Hybrid Electrochemical Mechanical Planarization Process for Cu Dual-Damascene Through-Silicon Via Using Noncontact Electrode Pad