Shiratori Yuta | Research Center for Integrated Quantum Electronics and Graduate School of Information Science and Technology, Hokkaido University, N14, W9, Kita-ku, Sapporo 060-0814, Japan
スポンサーリンク
概要
- Shiratori Yutaの詳細を見る
- 同名の論文著者
- Research Center for Integrated Quantum Electronics and Graduate School of Information Science and Technology, Hokkaido University, N14, W9, Kita-ku, Sapporo 060-0814, Japanの論文著者
関連著者
-
KASAI Seiya
Research Center for Integrated Quantum Electronics (RCIQE), Hokkaido University
-
Shiratori Yuta
Research Center For Integrated Quantum Electronics And Graduate School Of Information Science And Te
-
Shiratori Yuta
Research Center for Integrated Quantum Electronics and Graduate School of Information Science and Technology, Hokkaido University, N14, W9, Kita-ku, Sapporo 060-0814, Japan
-
Abd Rahman
Research Center for Integrated Quantum Electronics and Graduate School of Information Science and Technology, Hokkaido University, N14, W9, Kita-ku, Sapporo 060-0814, Japan
-
Nakata Daisuke
Research Center for Integrated Quantum Electronics and Graduate School of Information Science and Technology, Hokkaido University, N14, W9, Kita-ku, Sapporo 060-0814, Japan
-
Kasai Seiya
Research Center for Integrated Quantum Electronics (RCIQE) and Graduate School of Information Science and Technology, Hokkaido University, North 13, West 8, Sapporo 060-8628, Japan
-
Kasai Seiya
Research Center for Integrated Quantum Electronics and Graduate School of Information Science and Technology, Hokkaido University, N14, W9, Kita-ku, Sapporo 060-0814, Japan
著作論文
- Boolean Logic Gates Utilizing GaAs Three-Branch Nanowire Junctions Controlled by Schottky Wrap Gates