MIURA Koichi | Graduate Shool of Information Science and Technology, The University of Tokyo

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Graduate Shool of Information Science and Technology, The University of Tokyo | 論文

• Associating Semantically Structured Cooking Videos with Their Preparation Steps
• Cache Coherence Strategies for Speculative Multithreading CMPs : Characterization and Performance Study(Processor Architecture)
• Bus Serialization for Reducing Power Consumption(Processor Architecture)
• Way-variable Caches for Static Power Reduction (デザインガイア2003--VLSI設計の新しい大地を考える研究会)
• Way-variable Caches for Static Power Reduction

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