Liou F. | United Microelectronics Corp. Logic Technology Department Technology & Process Development Divis
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- LIOU F. T.の詳細を見る
- 同名の論文著者
- United Microelectronics Corp. Logic Technology Department Technology & Process Development Divisの論文著者
United Microelectronics Corp. Logic Technology Department Technology & Process Development Divis | 論文
- The Impact for Gate Oxide Scaling (32Å-12Å) and Power Supply for Sub-0.1μm CMOSFETs
- Optimization of Active Geometry Configuration and Shallow Trench Isolation (STI) Stress for Advanced CMOS Devices
- A Low Thermal-Budget High-Performanced 0.25-0.18um Merged Logic and DRAM