Saito Hiroaki | Department Of Electrical And Electronic Engineering Tokyo University Of Agriculture & Technology
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Department Of Electrical And Electronic Engineering Tokyo University Of Agriculture & Technology | 論文
- An Improved Method of Convex Rectilinear Block Packing Based on Sequence-Pair(Place and Routing)(VLSI Design and CAD Algorithms)
- The O-Sequence : Representation of 3D-Dissection
- An Efficient Decoding Method of Sequence-Pair with Reduced Redundancy(Special Section on VLSI Design and CAD Algorithms)
- A Graph Based Soft Module Handling in Floorplan(Floorplan and Placement, VLSI Design and CAD Algorithms)
- Minimizing the Number of Empty Rooms on Floorplan by Dissection Line Merge(Programmable Logic, VLSI, CAD and Layout, Recent Advances in Circuits and Systems-Part 1)