Kihara Takao | Division Of Electrical Electronics And Information Engineering Graduate School Of Engineering Osaka
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Division Of Electrical Electronics And Information Engineering Graduate School Of Engineering Osaka | 論文
- A 10-bit 800-Column Low-Power RAM Bank Including Energy-Efficient D-Flip-Flops for a Column-Parallel ADC(Analog Circuit Techniques and Related Topics)
- Application of Noise-Enhanced Detection of Subthreshold Signals for Communication Systems
- A Transformer Noise-Canceling Ultra-Wideband CMOS Low-Noise Amplifier
- A 0.5V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier
- A Reference Voltage Buffer with Settling Boost Technique for a 12bit 18MHz Multibit/Stage Pipelined A/D Converter