Chang Yu-juey | Chung-cheng University
スポンサーリンク
概要
関連著者
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Chang Yu-juey
Chung-cheng University
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Yeh Chingwei
The Dept. Of Electrical Engineering Chung-cheng University
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Wang Jinn-shyan
The Dept. Of Electrical Engineering Chung-cheng University
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WANG Jinn-Shyan
the Dept. of Electrical Engineering, Chung-Cheng University
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YEH Chingwei
the Dept. of Electrical Engineering, Chung-Cheng University
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Wang Jinn-shyan
Dept. Of Electrical Engineering Chung-cheng University
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Yeh Chingwei
Dept. Of Electrical Engineering Chung-cheng University
著作論文
- Heuristic Sizing Methodology for Designing High-Performance CMOS Level Converters with Balanced Rise and Fall Delays
- Design of High-Performance CMOS Level Converters Considering PVT Variations