Wong Shyh-chyi | Taiwan Semiconductor Manufacturing Corporaton
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概要
Taiwan Semiconductor Manufacturing Corporaton | 論文
- Generalized Interconnect Delay Time and Crosstalk Models: II. Crosstalk-Induced Delay Time Deterioration and Worst Crosstalk Models : Semiconductors
- Generalized Interconnect Delay Time and Crosstalk Models: I. Applications of Interconnect Optimization Design : Semiconductors
- The Impacts of Back-End High Temperature Thermal Treatments on the Characteristics and Gate Oxide Reliability of Thin Film Transistor in Ultra Large Scale Integrated Circuit Process
- Impact of Hydrogenating Plasma Induced Oxide Charging Effects on the Characteristics of Polysilicon Thin Film Transistors