Isahara Hitoshi | Kobe Univ. Kobe‐shi Jpn
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概要
Kobe Univ. Kobe‐shi Jpn | 論文
- A Dependable SRAM with 7T/14T Memory Cells
- A 10T Non-precharge Two-Port SRAM Reducing Readout Power for Video Processing
- Area Comparison between 6T and 8T SRAM Cells in Dual-V_ Scheme and DVS Scheme(Memory Design and Test,VLSI Design and CAD Algorithms)
- Area Optimization in 6T and 8T SRAM Cells Considering V_ Variation in Future Processes(Next-Generation Memory for SoC,VLSI Technology toward Frontiers of New Market)
- Simulation of Multi-Band Quantum Transport Reflecting Realistic Band Structure